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Nvidia Summer Internship – SRAM Circuit Design Engineer In Urbana

    Website Nvidia

    Job Description:

    NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to seek, that only we can pursue, and that matter to the world. This is our life’s work, to amplify human creativity and intelligence. We are looking for you!

    Job Responsibilities:

    • Use Verilog, VHDL, simulators and waveform debugging tools. Write RTL and perform verification against circuit
    • Drive the concepts of the transistor level circuit design, modeling and performance analysis process and optimize design for power, timing, area and yield
    • Develop and Perform timing characterization and circuit verification
    • We will have creative new insights to support existing tools and flows
    • You’ll have a voice to collaborate with cross function teams with regards to SRAM issues
    • You’ll make the layout floorplan and work with layout designers to optimize it for power and performance
    • Responsible for the state of the art processor design in sophisticated technologies, and on the design, verification and characterization of SRAM
    • Collaborate with the support development of tools using Perl/Python

    Job Requirements/Qualifications:

    • Able to learn quickly, self-driven, and are results-oriented
    • Experienced with ASIC design semi-custom and full-custom flow
      Strong background in deep submicron process issues
    • Deep background of the design, verification and characterization of SRAM/caches
    • Hands-on experience running SPICE simulation, and capability to adapt to new simulation tools
    • Strong proficiency in scripting language, such as, Perl, Tcl, Make, and automation methods/algorithms a certain plus
    • Previous SRAM design internship/work experience is desired
    • MS or PhD in Electrical or Computer Engineering or equivalent experience
    • Solid understanding on generating performance/power/margin data of SRAM, validation of data and QA process
    • Excellent writing and reporting skills with strong communication and analytical skills
    • Proven experience on transistor-level circuit design and circuit behavior analysis
    • Familiar with EMIR/Aging/Self heating and their impacts to circuit/layout implementations and signoff flows

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